https://wiki.hacdc.org/api.php?action=feedcontributions&user=96.231.155.34&feedformat=atomHacDC Wiki - User contributions [en]2022-08-14T09:10:26ZUser contributionsMediaWiki 1.37.1https://wiki.hacdc.org/index.php?title=FPGA_Workshop&diff=2269FPGA Workshop2009-10-03T05:27:35Z<p>96.231.155.34: /* Workshop Frequently Asked Questions */</p>
<hr />
<div>== Main Topics ==<br />
1) Introduction to digital logic & design<br><br />
2) Verilog HDL modeling & testing<br><br />
3) FPGA's & using them.<br><br />
<br><br />
We will be taking an approach of reviewing & learning digital design, implementing designs and methods of formally simulating and verifying designs before moving into FPGA oriented work. This workshop will be more engineering oriented than hobbyist/tinkerer oriented.<br />
<br />
== Hardware ==<br />
We'll be covering some FPGA specific topics and projects using real hardware. The first half of the workshop will cover logic design, implementation and testing. This will allow people to put off ordering any hardware until they know that they actually want to pursue FPGA development, since the dev board I've chosen for this is not cheap but I feel is robust enough to be a good starting board for this group.<br />
<br><br><br />
The hardware we'll be using is the Xilinx Spartan 3AN development kit. This kit is available from a few vendors for 199USD + shipping. This will be discussed more later on. The kit includes programming cable, and evaluation copies of some of the Xilinx tools."<br />
<br />
== Tools ==<br />
<br />
=== Verilog Simulation and Waveform Viewing ===<br />
Icarus verilog & gtkwave; for doing Verilog compilation, simulation and waveform viewing. A makefile has been made to simplify the flow for any exercises and projects we use these tools with. That makefile can be found [[iverilogmakefile|'''here''']].<br><br><br />
<br />
=== FPGA Toolchain ===<br />
After we finish up with covering Verilog modeling, we'll move to the Xilinx ISE Webpack tools and actual work with FPGAs. This software is available from Xilinx for free, and is available for Windows and Linux platforms. This will be used for Verilog compilation, simulation, synthesis of designs, design mapping, place and routing of designs, bitstream generation and board programming.<br><br><br />
=== Virtual Machine ===<br />
An OpenSuse Virtual Machine (VMWare based) will be available for people to use in this course, if they wish. This will<br />
have the icarus verilog tools and GTKwave loaded on it, along with Firefox, gcc and make. The suseStudio team has encouraged the use of their VMs in such a manner (teaching workshops). This is being built in susestudio, and will be available as a live install as well.<br />
<br><br />
When we move over to the Xilinx tools, people will have to download and install the Xilinx tools by themselves, since that material is copyrighted. Instructions will be given for doing that.<br />
<br />
== Lecture ==<br />
Lecture/Discussions will mainly be based on content from a pair of courses in MIT's Opencourseware initiative. This content is licensed on the Creative Commons Attribution NonCommercial Share-alike 3.0 license; as a result, the electronic content generated by the workshop will also need to be made available under the same license. This will allow people to freely access just the discussion slides without watching through videos.<br> <br> A video archive will be made available for those unable to attend.<br />
<br />
=== List of Lectures ===<br />
''This is currently an incomplete list, additional topics will be added as I solidify them - wgibb''<br />
{| border="1"<br />
|Week<br />
|Date<br />
|Topics Covered<br />
|Exercise<br />
|-<br />
|1<br />
|October 7th, 2009<br />
|Workshop Introduction & Introduction to digital systems and design<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|2<br />
|October 14th, 2009<br />
|Boolean Logic, combinatorial circuits and timing<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|3<br />
|October 21st, 2009<br />
|Introduction to Verilog Coding, focusing on combinatorial circuits<br />
|Verilog Coding - Modular Full Adder Design and Simulation<br />
|-<br />
|4<br />
|October 28th, 2009<br />
|Digital Arithmetic and adder styles<br />
|Implement various adders, static gate delays & modeling their timing effects<br />
|-<br />
|5<br />
|November 11th, 2009<br />
|Introduction to Sequential Logic and Flip-Flops<br />
|Modeling & Simulation of Flip Flops and simple Sequential Logic<br />
|-<br />
|6<br />
|November 18th, 2009<br />
|Finite State Machines & You<br />
|Modeling of Finite State machines<br />
|-<br />
|7<br />
|November 25th, 2009<br />
|TBD<br />
|Practical FSM Exercise<br />
|-<br />
|8<br />
|December 2nd, 2009<br />
|Introduction to FPGAs - History, Capabilities and Features<br />
|Load up Xilinx Tools & conversion of past exercises into ISE Projects, time permitting<br />
|-<br />
|9<br />
|December 9th, 2009<br />
|Logic Synthesis & Design considerations with FPGAs<br />
|TBD<br />
|-<br />
|10<br />
|December 16th, 2009<br />
|TBD<br />
|TBD<br />
|}<br />
<br />
== Workshop requirements ==<br />
<br />
This workshop will be free of charge to attend, but there are additional needs in order to fully benefit from attending the workshop.<br />
* Open mind to learning<br />
* Willingness to read documentation, as the capacity for independent research is important for doing hardware design.<br />
* Willingness to commit time over this fall<br />
* Either ability to run a VMWare virtual machine, the ability to convert the VM for virtualBox, or ability to install the icarus verilog/gtkwave tools on your own. This will likely necessitate a laptop of some sort.<br />
* Xilinx.com account, for licensing Xilinx tools and IP.<br />
* Hardware will NOT be required at the beginning of the course but will be needed later on to run exercises and to do any interesting projects<br />
<br />
== Workshop Frequently Asked Questions ==<br />
<br />
# What operating systems will the FPGA toolchain be available on?<br />
##The Xilinx ISE Webpack is supported on Windows XP Pro, Windows Vista Business, Redhat Linux and Suse Linux Enterprise. For a detailed list of official OS support, check out the [http://www.xilinx.com/ise/ossupport/index.htm Operating system support page on Xilinx.com]. The tools will run on openSuse as well. Feel free to try other linux distros and post your results.<br />
# What is the cost of the FPGA development board we'll be using?<br />
##The retail cost of the development board is typically around 199-220 USD, plus shipping, from a few different vendors. Links for that are [[FPGA_Workshop#Spartan_3AN_Starter_Kit|here]].<br />
# Will there be homework?<br />
##Since this isn't an academic course, there will not be graded homework in the traditional sense. I'll be choosing a few additional exercises that people can do outside of the workshop each week, if they wish, that will further help hone their skills.<br />
# Will there be extensive C/C++ coding?<br />
##C experience is not a prerequisite for this workshop. There will not be any C/C++ coding involved in the workshop directly. There is one project that I've got in mind that may be of interest to people that are proficient in C/C++ and pick up hardware design rather well.<br />
<br />
== Workshop Instructor ==<br />
<br />
William Gibb, mad scientist. For contacting him regarding the workshop, please email [mailto:teachmeFPGA@gmail.com teachmeFPGA@gmail.com].<br />
<br />
== References ==<br />
=== Grateful Dead Trees Reference ===<br />
Fundamentals of Digital Logic with Verilog Design by Brown and Vranesic <br><br />
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog by Lee <br><br />
FPGA Prototyping using Verilog Examples by Chu. <br> <br><br />
These texts will not be required for the course, but are very good launching points for the topics that we are covering.<br />
<br />
=== Online References ===<br />
==== FPGA Vendors ====<br />
[http://www.xilinx.com/ Xilinx] <br><br />
[http://www.altera.com/ Altera] <br><br />
[http://www.actel.com/ Actel] <br><br />
[http://www.atmel.com/products/fpga/ Atmel FPGA] <br><br />
[http://www.siliconbluetech.com/ Silicon Blue] <br><br />
[http://www.latticesemi.com/ Lattice Semiconductor] <br><br />
[http://www.achronix.com/ Achronix] <br><br />
==== Course Resources ====<br />
[http://www.icarus.com/eda/verilog/ Icaurus Verilog] <br><br />
[http://gtkwave.sourceforge.net/ GTKWave] <br><br />
[http://www.xilinx.com/tools/designtools.htm Xilinx Design Tools] <br><br />
[http://www.xilinx.com/support/documentation/index.htm Xilinx Documentation] <br><br />
[http://www.vmware.com/products/player/ VMware Player - Free download for Windows and Linux] <br><br />
[https://wiki.ubuntu.com/UbuntuMagazine/HowTo/Switching_From_VMWare_To_VirtualBox:_.vmdk_To_.vdi_Using_Qemu_+_VdiTool Convert VMware VMs to VirtualBox vms] untested by course instructor <br><br />
==== Spartan 3AN Starter Kit ====<br />
[http://www.xilinx.com/products/devkits/HW-SPAR3AN-SK-UNI-G.htm Spartan 3AN Starter Kit] <br><br />
[http://www.em.avnet.com/evk/home/0,1707,RID%253D0%2526CID%253D45129%2526CCD%253DUSA%2526SID%253D32214%2526DID%253DDF2%2526LID%253D32232%2526PRT%253D0%2526PVW%253D%2526BID%253DDF2%2526CTP%253DEVK,00.html AVNet Spartan 3AN Starter Kit sales page] <br><br />
[http://www.nuhorizons.com/ NuHorizons - Xilinx Vendor] Do a search for HW-SPAR3AN-SK-UNI-G <br><br />
[http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2621773&k=spartan%203an Digi-key Spartan 3AN Starter Kit Sales page] <br><br />
==== MIT OpenCourseWare links ====<br />
[http://ocw.mit.edu/OcwWeb/web/terms/terms/index.htm MIT OCW Terms of Use] <br><br />
[http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/6-004Computation-StructuresFall2002/CourseHome/index.htm OCW site for 6.004 - Computation Structures] <br><br />
[http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/6-111Spring-2006/CourseHome/index.htm OCW site for 6.111 Introductory Digital Systems, 2006] <br><br />
==== General Resources ====<br />
[http://www.opencircuitdesign.com/ Open Circuit Design] Open Source design tools <br><br />
[http://www.doulos.com/knowhow/ Doulos Digital Design Resources] Good learning and design references <br><br />
[http://www.asic-world.com/ ASIC World] Good learning references <br><br />
[http://www.fpga4fun.com/ FPGA4Fun] Lots of available IP <br><br />
[http://academic.csuohio.edu/chu_p/rtl/fpga_vlog.html Companion website for Professor Pong Chu's Verilog Book] <br></div>96.231.155.34https://wiki.hacdc.org/index.php?title=FPGA_Workshop&diff=2211FPGA Workshop2009-09-27T16:48:13Z<p>96.231.155.34: /* Grateful Dead Trees References */</p>
<hr />
<div>== Main Topics ==<br />
1) Introduction to digital logic & design<br><br />
2) Verilog HDL modeling & testing<br><br />
3) FPGA's & using them.<br><br />
<br />
== Hardware ==<br />
We'll be covering some FPGA specific topics and projects using real hardware. The first half of the workshop will cover logic design, implementation and testing. This will allow people to put off ordering any hardware until they know that they actually want to pursue FPGA development, since the dev board I've chosen for this is not cheap but I feel is robust enough to be a good starting board for this group.<br />
<br><br><br />
The hardware we'll be using is the Xilinx Spartan 3AN development kit. This kit is available from a few vendors for 199USD + shipping. This will be discussed more later on. The kit includes programming cable, and evaluation copies of some of the Xilinx tools."<br />
<br />
== Tools ==<br />
<br />
=== Verilog Simulation and Waveform Viewing ===<br />
Icarus verilog & gtkwave; for doing Verilog compilation, simulation and waveform viewing. A makefile has been made to simplify the flow for any exercises and projects we use these tools with. That makefile can be found [[iverilogmakefile|'''here''']].<br><br><br />
<br />
=== FPGA Toolchain ===<br />
After we finish up with covering Verilog modeling, we'll move to the Xilinx ISE Webpack tools and actual work with FPGAs. This software is available from Xilinx for free, and is available for Windows and Linux platforms. This will be used for Verilog compilation, simulation, synthesis of designs, design mapping, place and routing of designs, bitstream generation and board programming.<br><br><br />
=== Virtual Machine ===<br />
An OpenSuse Virtual Machine (VMWare based) will be available for people to use in this course, if they wish. This will<br />
have the icarus verilog tools and GTKwave loaded on it, along with Firefox and OpenOffice. The suseStudio team has encouraged the use of their VMs in such a manner (teaching workshops). This is being built in susestudio, and will be available as a live install as well.<br />
<br><br />
When we move over to the Xilinx tools, people will have to download and install the Xilinx tools by themselves, since that material is copyrighted. Instructions will be given for doing that.<br />
<br />
== Lecture ==<br />
Lecture/Discussions will mainly be based on content from a pair of courses in MIT's Opencourseware initiative. This content is licensed on the Creative Commons Attribution NonCommercial Share-alike 3.0 license; as a result, the electronic content generated by the workshop will also need to be made available under the same license. <br> <br> A video archive will be made available for those unable to attend.<br />
<br />
=== List of Lectures ===<br />
''This is currently an incomplete list - wgibb''<br />
{| border="1"<br />
|Week<br />
|Date<br />
|Topics Covered<br />
|Exercise<br />
|-<br />
|1<br />
|September 30th, 2009<br />
|Workshop Introduction & Introduction to digital systems and design<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|2<br />
|October 7th, 2009<br />
|Boolean Logic, combinatorial circuits and timing<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|3<br />
|October 14th, 2009<br />
|Introduction to Verilog Coding, focusing on combinatorial circuits<br />
|Verilog Coding - Modular Full Adder Design and Simulation<br />
|-<br />
|4<br />
|October 21st, 2009<br />
|Digital Arithmetic and adder styles<br />
|Implement various adders, static gate delays & modeling their timing effects<br />
|-<br />
|5<br />
|October 28th, 2009<br />
|Introduction to Sequential Logic and Flip-Flops<br />
|Modeling & Simulation of Flip Flops and simple Sequential Logic<br />
|-<br />
|6<br />
| TBD<br />
|Finite State Machines & You<br />
|Modeling of Finite State machines<br />
|-<br />
|7<br />
| TBD<br />
|More on FSM's<br />
| Practical FSM Exercise<br />
|}<br />
<br />
== Workshop Instructor ==<br />
<br />
William Gibb, mad scientist. For contacting him regarding the workshop, please email williamgibb+fpgaworkshop AT g m a i l D0t com [make the domain look like a real address]. Please use plus addressing to ensure a timely response to your message.<br />
<br />
== References ==<br />
=== Grateful Dead Trees Reference ===<br />
Fundamentals of Digital Logic with Verilog Design by Brown and Vranesic <br><br />
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog by Lee <br><br />
FPGA Prototyping using Verilog Examples by Chu. <br> <br><br />
These texts will not be required for the course, but are very good launching points for the topics that we are covering.<br />
<br />
=== Online References ===<br />
==== FPGA Vendors ====<br />
[http://www.xilinx.com/ Xilinx] <br><br />
[http://www.altera.com/ Altera] <br><br />
[http://www.actel.com/ Actel] <br><br />
[http://www.atmel.com/products/fpga/ Atmel FPGA] <br><br />
[http://www.siliconbluetech.com/ Silicon Blue] <br><br />
[http://www.latticesemi.com/ Lattice Semiconductor] <br><br />
[http://www.achronix.com/ Achronix] <br><br />
==== Course Resources ====<br />
[http://www.icarus.com/eda/verilog/ Icaurus Verilog] <br><br />
[http://gtkwave.sourceforge.net/ GTKWave] <br><br />
[http://www.xilinx.com/tools/designtools.htm Xilinx Design Tools] <br><br />
[http://www.xilinx.com/support/documentation/index.htm Xilinx Documentation] <br><br />
==== Spartan 3AN Starter Kit ====<br />
[http://www.xilinx.com/products/devkits/HW-SPAR3AN-SK-UNI-G.htm Spartan 3AN Starter Kit] <br><br />
[http://www.em.avnet.com/evk/home/0,1707,RID%253D0%2526CID%253D45129%2526CCD%253DUSA%2526SID%253D32214%2526DID%253DDF2%2526LID%253D32232%2526PRT%253D0%2526PVW%253D%2526BID%253DDF2%2526CTP%253DEVK,00.html AVNet Spartan 3AN Starter Kit sales page] <br><br />
[http://www.nuhorizons.com/ NuHorizons - Xilinx Vendor] Do a search for HW-SPAR3AN-SK-UNI-G <br><br />
[http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2621773&k=spartan%203an Digi-key Spartan 3AN Starter Kit Sales page] <br><br />
<br />
==== General Resources ====<br />
[http://www.opencircuitdesign.com/ Open Circuit Design] Open Source design tools <br><br />
[http://www.doulos.com/knowhow/ Doulos Digital Design Resources] Good learning and design references <br><br />
[http://www.asic-world.com/ ASIC World] Good learning references <br><br />
[http://www.fpga4fun.com/ FPGA4Fun] Lots of available IP <br><br />
[http://academic.csuohio.edu/chu_p/rtl/fpga_vlog.html Companion website for Professor Pong Chu's Verilog Book] <br></div>96.231.155.34https://wiki.hacdc.org/index.php?title=FPGA_Workshop&diff=2210FPGA Workshop2009-09-27T16:48:00Z<p>96.231.155.34: /* Grateful Dead Tree References */</p>
<hr />
<div>== Main Topics ==<br />
1) Introduction to digital logic & design<br><br />
2) Verilog HDL modeling & testing<br><br />
3) FPGA's & using them.<br><br />
<br />
== Hardware ==<br />
We'll be covering some FPGA specific topics and projects using real hardware. The first half of the workshop will cover logic design, implementation and testing. This will allow people to put off ordering any hardware until they know that they actually want to pursue FPGA development, since the dev board I've chosen for this is not cheap but I feel is robust enough to be a good starting board for this group.<br />
<br><br><br />
The hardware we'll be using is the Xilinx Spartan 3AN development kit. This kit is available from a few vendors for 199USD + shipping. This will be discussed more later on. The kit includes programming cable, and evaluation copies of some of the Xilinx tools."<br />
<br />
== Tools ==<br />
<br />
=== Verilog Simulation and Waveform Viewing ===<br />
Icarus verilog & gtkwave; for doing Verilog compilation, simulation and waveform viewing. A makefile has been made to simplify the flow for any exercises and projects we use these tools with. That makefile can be found [[iverilogmakefile|'''here''']].<br><br><br />
<br />
=== FPGA Toolchain ===<br />
After we finish up with covering Verilog modeling, we'll move to the Xilinx ISE Webpack tools and actual work with FPGAs. This software is available from Xilinx for free, and is available for Windows and Linux platforms. This will be used for Verilog compilation, simulation, synthesis of designs, design mapping, place and routing of designs, bitstream generation and board programming.<br><br><br />
=== Virtual Machine ===<br />
An OpenSuse Virtual Machine (VMWare based) will be available for people to use in this course, if they wish. This will<br />
have the icarus verilog tools and GTKwave loaded on it, along with Firefox and OpenOffice. The suseStudio team has encouraged the use of their VMs in such a manner (teaching workshops). This is being built in susestudio, and will be available as a live install as well.<br />
<br><br />
When we move over to the Xilinx tools, people will have to download and install the Xilinx tools by themselves, since that material is copyrighted. Instructions will be given for doing that.<br />
<br />
== Lecture ==<br />
Lecture/Discussions will mainly be based on content from a pair of courses in MIT's Opencourseware initiative. This content is licensed on the Creative Commons Attribution NonCommercial Share-alike 3.0 license; as a result, the electronic content generated by the workshop will also need to be made available under the same license. <br> <br> A video archive will be made available for those unable to attend.<br />
<br />
=== List of Lectures ===<br />
''This is currently an incomplete list - wgibb''<br />
{| border="1"<br />
|Week<br />
|Date<br />
|Topics Covered<br />
|Exercise<br />
|-<br />
|1<br />
|September 30th, 2009<br />
|Workshop Introduction & Introduction to digital systems and design<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|2<br />
|October 7th, 2009<br />
|Boolean Logic, combinatorial circuits and timing<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|3<br />
|October 14th, 2009<br />
|Introduction to Verilog Coding, focusing on combinatorial circuits<br />
|Verilog Coding - Modular Full Adder Design and Simulation<br />
|-<br />
|4<br />
|October 21st, 2009<br />
|Digital Arithmetic and adder styles<br />
|Implement various adders, static gate delays & modeling their timing effects<br />
|-<br />
|5<br />
|October 28th, 2009<br />
|Introduction to Sequential Logic and Flip-Flops<br />
|Modeling & Simulation of Flip Flops and simple Sequential Logic<br />
|-<br />
|6<br />
| TBD<br />
|Finite State Machines & You<br />
|Modeling of Finite State machines<br />
|-<br />
|7<br />
| TBD<br />
|More on FSM's<br />
| Practical FSM Exercise<br />
|}<br />
<br />
== Workshop Instructor ==<br />
<br />
William Gibb, mad scientist. For contacting him regarding the workshop, please email williamgibb+fpgaworkshop AT g m a i l D0t com [make the domain look like a real address]. Please use plus addressing to ensure a timely response to your message.<br />
<br />
== References ==<br />
=== Grateful Dead Trees References ===<br />
Fundamentals of Digital Logic with Verilog Design by Brown and Vranesic <br><br />
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog by Lee <br><br />
FPGA Prototyping using Verilog Examples by Chu. <br> <br><br />
These texts will not be required for the course, but are very good launching points for the topics that we are covering.<br />
<br />
=== Online References ===<br />
==== FPGA Vendors ====<br />
[http://www.xilinx.com/ Xilinx] <br><br />
[http://www.altera.com/ Altera] <br><br />
[http://www.actel.com/ Actel] <br><br />
[http://www.atmel.com/products/fpga/ Atmel FPGA] <br><br />
[http://www.siliconbluetech.com/ Silicon Blue] <br><br />
[http://www.latticesemi.com/ Lattice Semiconductor] <br><br />
[http://www.achronix.com/ Achronix] <br><br />
==== Course Resources ====<br />
[http://www.icarus.com/eda/verilog/ Icaurus Verilog] <br><br />
[http://gtkwave.sourceforge.net/ GTKWave] <br><br />
[http://www.xilinx.com/tools/designtools.htm Xilinx Design Tools] <br><br />
[http://www.xilinx.com/support/documentation/index.htm Xilinx Documentation] <br><br />
==== Spartan 3AN Starter Kit ====<br />
[http://www.xilinx.com/products/devkits/HW-SPAR3AN-SK-UNI-G.htm Spartan 3AN Starter Kit] <br><br />
[http://www.em.avnet.com/evk/home/0,1707,RID%253D0%2526CID%253D45129%2526CCD%253DUSA%2526SID%253D32214%2526DID%253DDF2%2526LID%253D32232%2526PRT%253D0%2526PVW%253D%2526BID%253DDF2%2526CTP%253DEVK,00.html AVNet Spartan 3AN Starter Kit sales page] <br><br />
[http://www.nuhorizons.com/ NuHorizons - Xilinx Vendor] Do a search for HW-SPAR3AN-SK-UNI-G <br><br />
[http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2621773&k=spartan%203an Digi-key Spartan 3AN Starter Kit Sales page] <br><br />
<br />
==== General Resources ====<br />
[http://www.opencircuitdesign.com/ Open Circuit Design] Open Source design tools <br><br />
[http://www.doulos.com/knowhow/ Doulos Digital Design Resources] Good learning and design references <br><br />
[http://www.asic-world.com/ ASIC World] Good learning references <br><br />
[http://www.fpga4fun.com/ FPGA4Fun] Lots of available IP <br><br />
[http://academic.csuohio.edu/chu_p/rtl/fpga_vlog.html Companion website for Professor Pong Chu's Verilog Book] <br></div>96.231.155.34https://wiki.hacdc.org/index.php?title=FPGA_Workshop&diff=2209FPGA Workshop2009-09-27T16:31:29Z<p>96.231.155.34: /* Dead Tree References */</p>
<hr />
<div>== Main Topics ==<br />
1) Introduction to digital logic & design<br><br />
2) Verilog HDL modeling & testing<br><br />
3) FPGA's & using them.<br><br />
<br />
== Hardware ==<br />
We'll be covering some FPGA specific topics and projects using real hardware. The first half of the workshop will cover logic design, implementation and testing. This will allow people to put off ordering any hardware until they know that they actually want to pursue FPGA development, since the dev board I've chosen for this is not cheap but I feel is robust enough to be a good starting board for this group.<br />
<br><br><br />
The hardware we'll be using is the Xilinx Spartan 3AN development kit. This kit is available from a few vendors for 199USD + shipping. This will be discussed more later on. The kit includes programming cable, and evaluation copies of some of the Xilinx tools."<br />
<br />
== Tools ==<br />
<br />
=== Verilog Simulation and Waveform Viewing ===<br />
Icarus verilog & gtkwave; for doing Verilog compilation, simulation and waveform viewing. A makefile has been made to simplify the flow for any exercises and projects we use these tools with. That makefile can be found [[iverilogmakefile|'''here''']].<br><br><br />
<br />
=== FPGA Toolchain ===<br />
After we finish up with covering Verilog modeling, we'll move to the Xilinx ISE Webpack tools and actual work with FPGAs. This software is available from Xilinx for free, and is available for Windows and Linux platforms. This will be used for Verilog compilation, simulation, synthesis of designs, design mapping, place and routing of designs, bitstream generation and board programming.<br><br><br />
=== Virtual Machine ===<br />
An OpenSuse Virtual Machine (VMWare based) will be available for people to use in this course, if they wish. This will<br />
have the icarus verilog tools and GTKwave loaded on it, along with Firefox and OpenOffice. The suseStudio team has encouraged the use of their VMs in such a manner (teaching workshops). This is being built in susestudio, and will be available as a live install as well.<br />
<br><br />
When we move over to the Xilinx tools, people will have to download and install the Xilinx tools by themselves, since that material is copyrighted. Instructions will be given for doing that.<br />
<br />
== Lecture ==<br />
Lecture/Discussions will mainly be based on content from a pair of courses in MIT's Opencourseware initiative. This content is licensed on the Creative Commons Attribution NonCommercial Share-alike 3.0 license; as a result, the electronic content generated by the workshop will also need to be made available under the same license. <br> <br> A video archive will be made available for those unable to attend.<br />
<br />
=== List of Lectures ===<br />
''This is currently an incomplete list - wgibb''<br />
{| border="1"<br />
|Week<br />
|Date<br />
|Topics Covered<br />
|Exercise<br />
|-<br />
|1<br />
|September 30th, 2009<br />
|Workshop Introduction & Introduction to digital systems and design<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|2<br />
|October 7th, 2009<br />
|Boolean Logic, combinatorial circuits and timing<br />
|Make sure people can run the Virtual Machine or FOSS tools<br />
|-<br />
|3<br />
|October 14th, 2009<br />
|Introduction to Verilog Coding, focusing on combinatorial circuits<br />
|Verilog Coding - Modular Full Adder Design and Simulation<br />
|-<br />
|4<br />
|October 21st, 2009<br />
|Digital Arithmetic and adder styles<br />
|Implement various adders, static gate delays & modeling their timing effects<br />
|-<br />
|5<br />
|October 28th, 2009<br />
|Introduction to Sequential Logic and Flip-Flops<br />
|Modeling & Simulation of Flip Flops and simple Sequential Logic<br />
|-<br />
|6<br />
| TBD<br />
|Finite State Machines & You<br />
|Modeling of Finite State machines<br />
|-<br />
|7<br />
| TBD<br />
|More on FSM's<br />
| Practical FSM Exercise<br />
|}<br />
<br />
== Workshop Instructor ==<br />
<br />
William Gibb, mad scientist. For contacting him regarding the workshop, please email williamgibb+fpgaworkshop AT g m a i l D0t com [make the domain look like a real address]. Please use plus addressing to ensure a timely response to your message.<br />
<br />
== References ==<br />
=== Grateful Dead Tree References ===<br />
Fundamentals of Digital Logic with Verilog Design by Brown and Vranesic <br><br />
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog by Lee <br><br />
FPGA Prototyping using Verilog Examples by Chu. <br> <br><br />
These texts will not be required for the course, but are very good launching points for the topics that we are covering.<br />
<br />
=== Online References ===<br />
==== FPGA Vendors ====<br />
[http://www.xilinx.com/ Xilinx] <br><br />
[http://www.altera.com/ Altera] <br><br />
[http://www.actel.com/ Actel] <br><br />
[http://www.atmel.com/products/fpga/ Atmel FPGA] <br><br />
[http://www.siliconbluetech.com/ Silicon Blue] <br><br />
[http://www.latticesemi.com/ Lattice Semiconductor] <br><br />
[http://www.achronix.com/ Achronix] <br><br />
==== Course Resources ====<br />
[http://www.icarus.com/eda/verilog/ Icaurus Verilog] <br><br />
[http://gtkwave.sourceforge.net/ GTKWave] <br><br />
[http://www.xilinx.com/tools/designtools.htm Xilinx Design Tools] <br><br />
[http://www.xilinx.com/support/documentation/index.htm Xilinx Documentation] <br><br />
==== Spartan 3AN Starter Kit ====<br />
[http://www.xilinx.com/products/devkits/HW-SPAR3AN-SK-UNI-G.htm Spartan 3AN Starter Kit] <br><br />
[http://www.em.avnet.com/evk/home/0,1707,RID%253D0%2526CID%253D45129%2526CCD%253DUSA%2526SID%253D32214%2526DID%253DDF2%2526LID%253D32232%2526PRT%253D0%2526PVW%253D%2526BID%253DDF2%2526CTP%253DEVK,00.html AVNet Spartan 3AN Starter Kit sales page] <br><br />
[http://www.nuhorizons.com/ NuHorizons - Xilinx Vendor] Do a search for HW-SPAR3AN-SK-UNI-G <br><br />
[http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2621773&k=spartan%203an Digi-key Spartan 3AN Starter Kit Sales page] <br><br />
<br />
==== General Resources ====<br />
[http://www.opencircuitdesign.com/ Open Circuit Design] Open Source design tools <br><br />
[http://www.doulos.com/knowhow/ Doulos Digital Design Resources] Good learning and design references <br><br />
[http://www.asic-world.com/ ASIC World] Good learning references <br><br />
[http://www.fpga4fun.com/ FPGA4Fun] Lots of available IP <br><br />
[http://academic.csuohio.edu/chu_p/rtl/fpga_vlog.html Companion website for Professor Pong Chu's Verilog Book] <br></div>96.231.155.34