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1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA.
1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA. (DONE)


2: Add a 24-bit color gradient to the test pattern with the addition of a THS8134B video DAC on the output.
2: Add a 24-bit color gradient to the test pattern with the addition of a THS8134B video DAC on the output.

Revision as of 18:17, 13 January 2010

Video scaler with VGA output

To reduce the high likelihood of this project ending in undebuggable disaster, I plan to start off with simple goals and add complexity to the code and input/output circuitry incrementally.


1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA. (DONE)

2: Add a 24-bit color gradient to the test pattern with the addition of a THS8134B video DAC on the output.

3: Create a dual framebuffer in the devboard's SRAM.

4: Use the framebuffer to display low resolution (<640x480) 24-bit digital video input within a 640x480 output frame without scaling.

5: Attempt to implement scaling algorithms to scale the input resolution to fill the full frame of the output resolution.


If I can manage to get this far, I will add additional objectives. Eventually I would like to build a deinterlacer/scaler for interlaced RGB video.